AI Compiler Engineer

Grow with Us

Join a team at the forefront of innovation, where your work will directly influence the capabilities of next-generation 5G/6G silicon.

AI Compiler Engineer — Research Team

Location: Austin, Texas (This is not a remote opportunity)

Focus Areas: MLIR Architecture | Compiler Infrastructure | 5G/6G Silicon | Bare-Metal AI

The Mission:
This role transcends typical AI compiler engineering. Instead of optimizing for existing GPUs, you will architect and implement a complete MLIR-based compiler stack from scratch. This purpose-built system will enable the execution of massive AI models, such as Llama 3, on bare-metal 5G/6G telecommunications silicon, where resource constraints are extreme and every byte of memory is critical. You will be instrumental in bridging the gap between cutting-edge AI research models and hardware-optimized silicon execution.

What You'll Actually Be Doing:

• MLIR Architecture — Own the Stack: Design and implement custom MLIR dialects, including TableGen definitions, transformation passes, and dialect conversion infrastructure. This involves bridging high-level AI graphs with the intricacies of custom silicon.
• Lowering & Legalization — Zero Tolerance for Approximation: Systematically lower high-level computational graphs (from JAX, StableHLO) into hardware-specific IR, ensuring complete mathematical fidelity. Every operation must legalize, and every semantic must be preserved.
• Concurrency & Memory Modeling — Orchestrate the Machine: Develop static scheduling and tiling passes to precisely manage data movement between High Bandwidth Memory (HBM) and on-chip local memory, given the absence of virtual memory or garbage collection. Accuracy in this area is paramount for successful execution.
• Production C++ — Code That Ships to Silicon: Maintain a high-performance, modular, LLVM-based compiler codebase where correctness and determinism are non-negotiable requirements for production deployment on silicon.

Join Our Team

What You Bring:

• MLIR Mastery: Proven experience building custom passes, dialect conversions, writing TableGen definitions, and navigating the complexities of MLIR in a production environment.
• Compiler Fundamentals: Deep, hands-on expertise in C++ and LLVM, including IR structure, pass pipelines, and code generation pipelines used in production.
• Framework Integration: Experience exporting and lowering real AI models from frameworks like JAX, PyTorch, or TensorFlow, understanding the transition from research checkpoints to deployable IR.
• Dialect Expertise: In-depth knowledge of StableHLO or XLA at the op-semantics level.

What Makes You Exceptional:

• Experience targeting Embedded DSP or VLIW architectures, including instruction scheduling and register pressure management.
• Advanced optimization depth, including loop tiling, vectorization, quantization lowering, and fixed-point arithmetic.
• Hardware-level awareness of DMA engines, multi-level memory hierarchies, and complex number handling within MLIR.

Why This Role Is Different:
This is a unique opportunity to build the foundational compiler for a new class of 5G/6G AI silicon. Your decisions at the IR level will directly shape the capabilities of future telecommunications infrastructure. If you are driven by complex, simultaneous challenges across compilers, hardware, and research, and want your code to run at the edge of the global wireless network, this is the role for you.

What Happens Once You Apply?

Click Here to learn about our typical hiring process.

Ericsson is an Equal Opportunity employer committed to merit-based hiring and fostering innovation through diverse experiences and perspectives. We encourage all backgrounds to apply.

For assistance or accommodation requests due to disability, please contact hr.direct.americas@ericsson.com.

DISCLAIMER: The responsibilities outlined are general and may be subject to additional tasks as assigned.

Primary country and city: USA || Austin, Texas
Job details: Developer
Primary Recruiter: Jim Everett

Compensation and Benefits at Ericsson

Ericsson offers a competitive compensation and benefits package designed to support your individual needs and goals.

Your Pay:
The salary range is dependent on factors such as location, job-related knowledge, qualifications, skills, education, training, and experience.

Your Health:
We provide excellent health benefits, including a choice of three medical plan options and a dental plan. Employees receive company credits to cover premiums for themselves and eligible dependents.

Your Financial Security:

• 401(k) Plan: Features an automatic 3% company contribution and a dollar-for-dollar match up to 3% of eligible pay, plus a 50% match on the next 2%. Full matching contributions of 4% are achieved when contributing at least 5% of eligible pay.
• Company Paid Benefits: Employees receive company credits covering the cost of basic life insurance, basic accidental death and dismemberment coverage, and short-term and long-term disability coverage.
• Stock Purchase Plan: Option to participate in Ericsson’s Stock Purchase Plan.

Your Time:

• Work-Life Balance: A minimum of 15 days accrued vacation, up to 3 personal days, 11 annual holidays, 8 hours of volunteer time, and 80 hours of sick time annually (pro-rated based on start date).
• Leave: Up to 16 weeks of paid maternity leave and 6 weeks of paid parental or adoption leave (100% of pay).

Additional Benefits:
Includes financial wellness programs, educational assistance, matching gifts, and recognition programs.